What are Flip Flop circuits?

Flip Flop is a circuit that has two stable digital states i.e. logic-1 or HIGH and logic-0 or LOW. The status can be flipped between ‘0’ and ‘1’ by changing the digital status at input side. They can be used to store digital information. It has input side that takes different sets of logic input and clock signal and has two outputs. One output is complement of other i.e. if one is at HIGH state the other will be at LOW state and vice-e-versa. These outputs are mostly denoted by ‘Q’ and other as a hyphen on Q or Q', but that’s not mandatory, any alphabet can be used. The status of output pins depend on status of combination of digital inputs and the clock status. Since the status of output is stable (either ‘0’ or ‘1’), flip flop can be used to store one bit of digital data. 

There are mostly below four types of flip flops which are widely used. 

    - SR Flip Flop (also known as Set-Reset flip flop) 

    - JK Flip Flop (also known as Jack Kilby flip flop based on name of its inventor) 

    - D Flip Flop (known as Data flip flop) 

    - T Flip Flop (known as Toggle flip flop)

All these flip flops can be realized using combinations of different types of digital gates we discussed in previous topic. We will discuss each type in detail.

What are their uses?

These different types of flip-flops are being used in digital electronic circuits, some of the applications of Flip-flops are as specified below.

• Counters
• Frequency Dividers
• Shift Registers
• Storage Registers
• Bounce elimination switch
• Data storage
• Data transfer
• Latch
• Registers
• Storage Memory

 

SR Flip Flop (Set-Reset flip flop)

This is the logic diagram of SR flip flop using four gates, the symbol and the truth table. We can see in truth table that when the clock is LOW, there is no change in output for any combination of input at ‘S’ and ‘R’ inputs. ‘X’ in truth table denotes any value. It can be anything either LOW or HIGH. So the output is controlled by Clock (Clk) signal. Thus the output has two stable states when the clock is HIGH.

Since the output is stable at either HIGH(1) or LOW(0) hence this can store one bit of digital data.

D(Data) Type Flip Flop:

D Type flip flop is also used as a digital memory storage element. This flip flop can be realized using four NAND gates and one NOT gate as shown here. Here again the output is effected only when the Clock (Clk) input is HIGH. While the clock is LOW, there is no change in output for any value at ‘D’ input hence in truth table in first line ‘X’ is used.  Here again the output has two stable states i.e. either LOW (0) or HIGH (1).

JK (Jack KIlby) Flip Flop:

This flip flop was invented by Jack Kilby from Texas instruments, hence named as JK Flip Flop. Similar to SR and D type flip flop, the output state changes only when the clock signal is HIGH. While the clock is low there is no impact on output for any combination of inputs. They are used in shift registers, counters and storage etc. The output of JK flip flop toggles from HIGH to LOW and LOW to HIGH when both ‘J’ & ‘K’ inputs are high and obviously the clock signal is HIGH. Similar to others, this can also store one bit of digital data as it has two stable states.

T(Toggle) Flip Flop: 

It has nature of toggling the output between HIGH and LOW, hence the name given T (Toggle) flip flop. Looking at the logical diagram, we can see that it’s a modified version of JK flip flop. Here again there is no change in output while the clock signal is LOW. So, the output is again controlled by clock signal as we can see in truth table also. They are used in digital counters.

In next topic we will see a very multipurpose timer IC555 and its operation where we will see use of op-amps and flip flops as the building block of this IC. We will also see few of the implementations of IC555 in small hobby projects which are very easy to build.

Return to List of content